ATML Accelerating Devices

About

The ATML Accelerating Devices researches in GPU and other accelerators.

We support researchers, using the devices and trying to get the most of the hardware; we consult, analyze and optimize. In close collaboration with vendors, we investigate performance opportunities and mitigate limiters. We bring our knowledge into a number of projects, working with researchers of various domains on different levels.

Read our blog to find out about some highlights of our work!

Within the Program-oriented Funding (PoF IV) of Helmholtz Information, this group contributes to Program 1 “Engineering Digital Futures”, Topic 1 “Enabling Computational- & Data-Intensive Science and Engineering” and Topic 2 “Supercomputing & Big Data Infrastructures”.

Research Topics

  • Application-Enablement for Accelerators
  • Hardware Co-Design
  • Next-Generation Devices
  • Compute Efficiency
  • Exploitation of specific, low-level features
  • Multi-Device Optimization
  • GPUs
  • FPGAs
  • Dataflow Processors (AI Chips)

Contact

Dr. Andreas Herten

JSC

Building 16.3 / Room 228

+49 2461/61-1825

E-Mail

Projects

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Previous Projects

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Members

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ATML Accelerating Devices
Group Picture, June 2022

Publications of the ATML Accelerating Devices

Events

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Interested in our projects? Contact Andreas!

Dr. Andreas Herten

Co-Lead of division Novel System Architecture design, head of ATML Accelerating Devices PI in Helmholtz Information Program 1, Topics 1 and 2

  • Jülich Supercomputing Centre (JSC)
Building 16.3 /
Room 228
+49 2461/61-1825
E-Mail
Last Modified: 04.10.2025