First Modular Supercomputer worldwide starts operation

Jülich, 13 November – The second module of JURECA is as large as an entire supercomputer: the booster is accommodated across 33 cabinets in the computer hall of the Jülich Supercomputing Centre (JSC). The expansion, developed by Intel and the JSC in cooperation with Dell EMC and ParTec to massively increase the available computing power, is directly connected to the first module, the cluster, which was supplied by T-Platforms in 2015. Thanks to the additional 5 petaflop/second - equivalent to 5 billion computing operations per second - the Jülich supercomputer now appears as one of the fastest computers in Europe on the TOP500 list of the fastest computers in the world, the current version of which has been published today. Above all, this is the first time that a supercomputer with an innovative modular architecture has gone into productive operation worldwide.

JURECA Booster
5-Petaflop/s-Booster in der Rechnerhalle des Jülich Supercomputing Centre (JSC)
Forschungszentrum Jülich / W.-P. Schneider

The modular concept of JURECA - JURECA stands for "Jülich Research on Exascale Architectures" - originates from the EU-funded research projects DEEP and DEEP-ER. The aim of the projects, led by Dr. Estela Suarez, a scientist from Jülich, was to develop a modular supercomputer architecture that is specially tailored to the requirements of modern simulation codes. Various types of modules can be dynamically allocated to the programs by means of the "ParaStation" software system developed by the Munich-based company ParTec, so that their individual advantages can be exploited.

"This works like a turbocharger: a booster module accelerates calculations on a cluster module, or in other words, complex parts of the code, which are difficult to calculate simultaneously on a large number of processors, are executed on the so-called cluster module ", explains Prof. Thomas Lippert, head of the Jülich Supercomputing Centre and originator of the concept. "Simpler parts of the program that can be processed in parallel with greater efficiency, i.e., they are scalable, are transferred to the booster module.", The booster module uses a large number of relatively slow but energy-efficient cores.

"The successful installation and integration of the booster marks a significant milestone in our efforts to develop highly innovative modular supercomputing systems and to make them available together with industry-leading companies such as T-Platforms, Intel, Dell EMC and ParTec for scientific simulations, for example in materials science or brain and climate research," explains Dr. Dorian Krause, responsible for computer operation at the JSC. "The test run for the TOP500 was a good proof of the performance and stability of the JURECA cluster booster system. More importantly, we are delighted to be able to make this unique architecture available to our entire user community," said Krause.

"We are extremely pleased by the successful implementation of this new computer architecture with the help of our software ParaStation. This software has specifically been developed to handle the unique, inventive modular architecture of these futuristic systems. This is a spectacular first step to the provision of the exascale computer, needed in the world for ever growing scientific and civil/commercial applications, from internet to automatic driving, and much more. A world wide 'first' and remarkable lead in the race to exascale", says Bernhard Frohwitter, CEO of ParTec.

Facts and figures

The JURECA cluster booster system achieved rank 29 in the TOP500 list with a performance of 3.78 petaflop/second. The updated version of this list of the world's fastest computers - which celebrated its 25th anniversary and the 50th edition - was presented today at the beginning of the international supercomputing conference SC17 in Denver, USA.

With the booster module 1,640 new computing nodes with Intel Xeon Phi 7250-F processors are added, each with 68 cores. Intel has deployed the system, which is based on Intel's Scalable Systems Framework (Intel® SSF), together with Dell EMC, using the Dell EMC PowerEdge C6230P server, interconnected with an Intel Omni-Path Architecture (OPA) network. The cluster-module was delivered already in 2015 by the Russian company T-Platforms, which actively supported the development of the booster. The system is operated by the ParaStation Cluster Suite from ParTec, which fully implements the software functionality required for modular supercomputing.

Quotations:

“Intel is very excited to have been chosen as the technology and systems partner for this breakthrough work in supercomputing with Jülich,” says Charles Wuischpard, VP & General Manager, Intel Data Center Solutions. “Intel has a long history of close collaboration with Jülich but this is the first time Intel played a more direct role in bringing an innovation like the Cluster-Booster design to fruition. Our engineers worked side by side with Jülich and our partners (Dell EMC and ParTec) to design, deliver, and implement this important advance in systems architecture.”

“Dell EMC is proud to collaborate with the Jülich Supercomputing Centre on one of the fastest supercomputers in Europe,” said Armughan Ahmad, senior vice president and general manager, Dell EMC Ready Solutions & Hybrid Cloud. “The successful combination of the new Booster system with the existing JURECA cluster is reflective of our commitment to work closely with our customers to develop accessible and innovative solutions that continue to advance human potential.”

Further reading:

Installation of the JURECA Booster (YouTube)

TOP500-list of the fastest computers in the world

DEEP research projects

JURECA supercomputer

ParTec Cluster Competence Center

Contacts:

Prof. Dr. Dr. Thomas Lippert
Director of the Jülich Supercomputing Centre (JSC)
Tel.: +49 2461 61-6402
E-Mail: th.lippert@fz-juelich.de

Dr. Dorian Krause
Leader of Division “High Performance Systems”
Jülich Supercomputing Centre (JSC)
Tel. +49 2461 61-3631
E-Mail: d.krause@fz-juelich.de

Press Contact:

Tobias Schlößer, Press officer
Forschungszentrum Jülich
Tel. +49 2461 61-4771
E-Mail: t.schloesser@fz-juelich.de

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Last Modified: 22.05.2022